Application Engineer, RTL2GDS Sr Director
AI summary of the role
Senior technical leader on Cadence's North America Field Applications Team, driving strategic customer engagements for top semiconductor companies.
No longer in the current catalog. Last included 2026-09-09. Check the employer’s posting for availability.
What you’ll do
- Define and execute technical engagement strategies for top semiconductor design teams
- Act as trusted advisor for executive-level stakeholders on Cadence digital implementation and signoff technologies
- Lead and mentor a high-performing team of Application Engineers
- Drive complex benchmarks, flow optimizations, and deployment of cutting-edge methodologies for Synthesis, P&R, STA, IR Drop, and power/timing closure
What you’ll bring
- 20+ years of experience in IC design implementation and signoff
- BS/MS in Electrical Engineering, Computer Engineering, or related field
- Deep expertise in digital design fundamentals and advanced node implementation (3nm and below)
- Proven track record of leading technical teams and driving customer success at executive levels
Technologies
Genus · Innovus · Tempus · Voltus · Conformal · Cerebrus · Tcl · Python · Perl · Synthesis · P&R · STA
About Cadence Design Systems
Provides EDA software, hardware emulation, design IP, and multiphysics simulation that semiconductor and systems companies use to design and verify chips, boards, and full electronic systems.
Public · 5000+ people
Source and classification
Internal deployment & tooling · Evidence for this classification:
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Overview The Sr Application Engineer Architect will serve as a senior technical leader within Cadence’s North America Field Applications Team, driving strategic customer engagements and influencing next-generation EDA & Agentic-AI solutions. This role demands exceptional technical depth, proven leadership, and the ability to align cross-functional teams toward delivering advanced design solutions for leading semiconductor companies. Key Responsibilities Strategic Leadership: Define and execute technical engagement strategies for top semiconductor design team, ensuring alignment with corporate objectives and customer success metrics. Customer Advocacy: Act as a trusted advisor for executive-level stakeholders, guiding adoption of Cadence’s digital implementation, signoff
More from the job description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Overview The Sr Application Engineer Architect will serve as a senior technical leader within Cadence’s North America Field Applications Team, driving strategic customer engagements and influencing next-generation EDA & Agentic-AI solutions. This role demands exceptional technical depth, proven leadership, and the ability to align cross-functional teams toward delivering advanced design solutions for leading semiconductor companies. Key Responsibilities Strategic Leadership: Define and execute technical engagement strategies for top semiconductor design team, ensuring alignment with corporate objectives and customer success metrics. Customer Advocacy: Act as a trusted advisor for executive-level stakeholders, guiding adoption of Cadence’s digital implementation, signoff technologies and AgenticAI features across advanced nodes (3nm and below). Team Development: Lead and mentor a high-performing team of Application Engineers, fostering technical excellence and career growth. Cross-Functional Collaboration: Partner with R&D and Product Engineering to influence tool enhancements based on real-world customer requirements. Innovation & Enablement: Drive complex benchmarks, flow optimizations, and deployment of cutting-edge methodologies for Synthesis, P&R, STA, IR Dr [... source excerpt omitted ...] t leader. Operational Excellence: Establish best practices for engagement models, resource planning, and technical escalations to ensure timely and successful project execution. Qualifications 20+ years of experience in IC design implementation and signoff, with demonstrated success in managing large-scale technical programs. BS/MS in Electrical Engineering, Computer Engineering, or related field. Deep expertise in digital design fundamentals, advanced node implementation (3nm and below), and EDA tool ecosystems. Proven track record of leading technical teams and driving customer success at executive levels. Strong proficiency in scripting (Tcl, Python, Perl) and flow customizat [... source excerpt omitted ...] offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We’re doing work that matters. Help us solve what others can’t.
Employer postings · Data from · Sources