Member of Technical Staff - Applied AI
AI summary of the role
Founding applied AI role at a frontier AI lab for chip design, translating hardware engineering expertise into agentic systems that generate and verify silicon.
What you’ll do
- Design and build AI agents that tackle core chip-design tasks, grounding model behavior in how real hardware engineers actually work.
- Own end-to-end agent workflows: scaffolding, tool use, evaluation harnesses, and domain-specific infrastructure.
- Serve as the hardware conscience of the model — curating high-quality data, defining evaluation criteria, and encoding engineering judgment.
- Partner closely with ML research, post-training, and infra teams to turn hardware domain expertise into reward signals, benchmarks, and training signal.
What you’ll bring
- MS or PhD in Electrical Engineering, Computer Engineering, EECS, or closely related field.
- Strong industry or research experience as an RTL design or Design Verification engineer with end-to-end chip design flow understanding.
- Excellent software engineering fundamentals — comfortable writing clean, production-grade Python or TypeScript.
- Demonstrated ability to own ambiguous problems end to end, prototype quickly, and productionize what works.
Technologies
RTL design · Design Verification · Python · TypeScript · LLM · agentic systems · tool use · evaluation harnesses · chip design flow
About Architect
Frontier AI lab building models and tools for on-demand custom ASICs, co-designed with evolving ML workloads to enable domain-specific chips.
Seed
Source and classification
Internal deployment & tooling · Evidence for this classification:
About Architect Architect is a frontier AI lab for chip design. We build AI models and tools for on-demand custom ASICs at scale. Our goal is to co-design custom ASICs alongside evolving ML workloads, and enable a new era of domain-specific chips that unlock capabilities impossible with current hardware paradigms. Born out of Stanford Research, our team blends AI with Silicon with a founding team from Anthropic, Google DeepMind, Meta SuperIntelligence, xAI, Apple and Intel. What You'll Do As a Founding Member of the Technical Staff (Applied AI) at Architect, you'll sit at the intersection of chip design and frontier AI — translating deep hardware engineering expertise into agentic systems that can reason about, generate, and verify real silicon. Design and build AI agents that tackle core chip-design tasks, grounding model behavior in how real hardware engineers actually work. Own
More from the job description
About Architect Architect is a frontier AI lab for chip design. We build AI models and tools for on-demand custom ASICs at scale. Our goal is to co-design custom ASICs alongside evolving ML workloads, and enable a new era of domain-specific chips that unlock capabilities impossible with current hardware paradigms. Born out of Stanford Research, our team blends AI with Silicon with a founding team from Anthropic, Google DeepMind, Meta SuperIntelligence, xAI, Apple and Intel. What You'll Do As a Founding Member of the Technical Staff (Applied AI) at Architect, you'll sit at the intersection of chip design and frontier AI — translating deep hardware engineering expertise into agentic systems that can reason about, generate, and verify real silicon. Design and build AI agents that tackle core chip-design tasks, grounding model behavior in how real hardware engineers actually work. Own end-to-end agent workflows: scaffolding, tool use, evaluation harnesses, and the domain-specific infrastructure that makes agents useful on actual design problems. Serve as the hardware conscience of the model — curating high-quality data, defining evaluation criteria, and encoding the engineering judgment that separates plausible outputs from correct ones. Partner closely with the ML research, post-training, and infra teams to turn hardware domain expertise into reward signals, benchmarks, and [... source excerpt omitted ...] ast in a 0→1 environment: prototype, dogfood, break things, iterate. Translate ambiguous chip-design challenges into concrete agent capabilities that ship. What We'd Like to See Qualifications & Skills: Degree: MS or PhD in Electrical Engineering, Computer Engineering, EECS, or a closely related field. Hardware Background: Strong industry or research experience as an RTL design or Design Verification engineer, with a solid understanding of the modern chip design flow end to end. Software Engineering: Excellent software engineering fundamentals — comfortable writing clean, production-grade Python or typescript, building tooling, and working in modern engineering environments. This
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