Principal Solutions Architect – Semiconductor Test
AI summary of the role
This senior individual contributor role defines and leads the technical strategy for semiconductor test at NVIDIA, covering wafer probe to final package test.
No longer in the current catalog. Last included 2026-09-09. Check the employer’s posting for availability.
What you’ll do
- Define comprehensive test development strategy across wafer-level (probe/ATE) and package/final/qual test for new and existing product families.
- Lead architectural trade-off decisions on test coverage, test time, cost of test, and quality escapes across the full test flow.
- Establish architectural guidelines for test program, Test Methods/Class structure, modularity, and reuse across ATE platforms (Advantest, Teradyne, etc.).
- Serve as senior liaison between build and test engineering for DFT architecture decisions including scan, BIST, JTAG, boundary scan, and embedded compression.
What you’ll bring
- 15+ years of hands-on semiconductor test engineering experience within a fab, IDM, or OSAT environment.
- Extensive knowledge in at least three of: ATE platform architecture, test program development, DFT methodology, yield analysis, or test data/ML analytics.
- Skilled in leading ATE platforms such as Advantest V93000, Teradyne UltraFLEX/ETS, or similar systems.
- Strong background in DFT architectures — scan compression, MBIST, LBIST, JTAG, and related methodologies.
Technologies
ATE · Advantest V93000 · Teradyne UltraFLEX · DFT · scan compression · MBIST · LBIST · JTAG · Python · Perl · C++ · STDF
About NVIDIA
Designs and manufactures GPUs and system-on-chips powering data centers, AI workloads, gaming, autonomous vehicles, and HPC. The foundational hardware for modern deep learning.
Public
Source and classification
Internal deployment & tooling · Evidence for this classification:
We are seeking a Staff/Principal Solutions Architect to define and lead the technical strategy for semiconductor test. This covers wafer and package test operations from start to finish. This senior individual contributor role is central to our manufacturing and product engineering teams. You will lead the architectural vision for device testing from wafer probe to final package test. Your directive includes modernising test infrastructure, improving yield, and embedding data-driven intelligence throughout the test lifecycle. You will partner closely with development, process, product engineering, and manufacturing teams across sites to ensure our test strategy scales with increasingly complex device portfolios. What You'll be doing: Define the comprehensive test development strategy across wafer-level (probe/ATE) and package/final/qual test for new and existing product families.
More from the job description
We are seeking a Staff/Principal Solutions Architect to define and lead the technical strategy for semiconductor test. This covers wafer and package test operations from start to finish. This senior individual contributor role is central to our manufacturing and product engineering teams. You will lead the architectural vision for device testing from wafer probe to final package test. Your directive includes modernising test infrastructure, improving yield, and embedding data-driven intelligence throughout the test lifecycle. You will partner closely with development, process, product engineering, and manufacturing teams across sites to ensure our test strategy scales with increasingly complex device portfolios. What You'll be doing: Define the comprehensive test development strategy across wafer-level (probe/ATE) and package/final/qual test for new and existing product families. Lead architectural trade-off decisions on test coverage, test time, cost of test, and quality escapes across the full test flow. Establish architectural guidelines for the test program, Test Methods/Class structure, modularity, and reuse across ATE platforms (Advantest, Teradyne, etc.). Serve as the senior liaison between build and test engineering for DFT architecture decisions — scan, BIST, JTAG, boundary scan, and embedded compression. Influence SoC and IP build reviews to ensure testability, [... source excerpt omitted ...] m you. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 216,000 USD - 345,000 USD. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until June 5, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, na
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